Advances in semi-conductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple cores and multiple logical processors present on individual integrated circuits. A processor or integrated circuit typically comprises a single processor die, where the processor die may include any number of cores or logical processors.
The ever increasing number of cores and logical processors on integrated circuits enables more software threads to be concurrently executed. However, the increase in the number of software threads that may be executed simultaneously have created problems with synchronizing data shared among the software threads. One common solution to accessing shared data in multiple core or multiple logical processor systems comprises the use of locks to guarantee mutual exclusion across multiple accesses to shared data. However, the ever increasing ability to execute multiple software threads potentially results in false contention and a serialization of execution.
For example, consider a hash table holding shared data. With a lock system, a programmer may lock the entire hash table, allowing one thread to access the entire hash table. However, throughput and performance of other threads is potentially adversely affected, as they are unable to access any entries in the hash table, until the lock is released. Alternatively, each entry in the hash table may be locked. Yet, the complexity for a programmer to manage a lock for each entry becomes extremely cumbersome. Either way, after extrapolating this simple example into a large scalable program, it is apparent that the complexity of lock contention, serialization, fine-grain synchronization, and deadlock avoidance is an extremely large burden for programmers.
Another recent data synchronization technique includes the use of transactional memory (TM), which may also be referred to as transactional execution. Often, transactional memory includes executing a group of a plurality of micro-operations, operations, or instructions. This group of operations/instructions is usually referred to as an atomic or critical section. In the example above, both threads execute within the hash table, and their accesses are monitored/tracked. If both threads access/alter the same entry, conflict resolution may be performed to ensure data validity. One type of transactional execution includes a Software Transactional Memory (STM), where accesses are tracked, conflict resolution, abort tasks, and other transactional tasks are primarily performed in software.
To accomplish tracking memory accesses in an STM, access barriers are inserted by a compiler at memory accesses in transactional program code. Often meta-data, which may be referred to as transaction records, are associated with memory addresses to provide appropriate access to and ownership of the associated memory addresses. Unfortunately, based on the implementation of how the transaction records are utilized and what level of exclusion they provide, a trade-off between performance and data validity under certain conditions exist. Currently, there is no unified concurrency control for a software transactional memory (STM) system.